The PLL technique has been around for a long time and has a wide variety of applications in wireless communication networks. It is frequently used for implementing operations such as demodulation, decoding, synchronisation, frequency synthesis or sampling.
In a frequency synthesiser, for instance, the PLL technique may be used for generating one or many accurate signal oscillation frequencies from one or more reference sources. In e.g. a radiofrequency (RF) receiver, a PLL may be associated with a signal mixer. A signal mixer is a circuit capable of translating a signal from a given frequency within the RF band to another, lower frequency known as an intermediate frequency (IF), by combining the RF signal with a signal oscillating at a given frequency generated by the PLL. However, apart from the RF signal, other oscillation frequencies generated by the operation of the PLL may reach the input of the mixer. These unwanted signals, known as spurs, may also be translated within the IF frequency band, thus resulting in a degradation of the receiver's performance in terms of signal-to-noise ratio (SNR).
In other part of a receiver, PLL technique may further be used for producing an accurate sampling frequency that can be used as an input for an analog-to-digital converter (ADC). An ADC is a circuit that converts an analog signal at a given frequency into a digital signal. However, apart from the frequency of the analog signal, other frequencies generated by the PLL may reach the analog input of the ADC. These unwanted signals, also known as spurs in that context, may affect the accuracy of the digital output signal resulting in a degradation of the ADC and hence of the receiver's performance.
In order to address these problems, some solutions may be considered to switch the default PLL frequency to another, more appropriate frequency. The intended effect is to reject the spurs out of the frequency bandwidth of the analog signal of interest. This technique, known as frequency evasion, however presents some drawbacks because wrong PLL frequency change decisions can be made which may result in a waste of time for re-synchronizing the PLL. In addition, a “ping-pong” effect, whereby the PLL frequency change is done too often, can be experienced. All of this leads to a degradation of the receiver performance. Therefore, it is desirable to improve the control scheme of the PLL frequency for e.g. preventing the degradation of the performances of a receiver of a wireless communication network, while avoiding or at least reducing the above negative effects.